Integrated circuits are formed on semiconductor wafers. The semiconductor wafers are then sawed into chips. The formation of integrated circuits includes many process steps such as deposition, chemical mechanical polish (CMP), plating, and the like. Accordingly, wafers are transported between different equipments.
A challenge faced by integrated manufacturing industry is that to improve cost efficiency, wafers become increasingly larger. In the meantime, wafers also become increasingly thinner. Furthermore, in the manufacturing of integrated circuits, wafers may need to be thinned. For example, in 3DIC technology, wafer thinning is used to thin down wafers to expose through-substrate vias (TSVs) formed therein, wherein the TSVs are important components for wafer/die stacking. However, handling such kind of thin wafers is very difficult. For example, the thin wafers suffer from breakage, particularly during the transportation and the CMP process, during which mechanical stress may be applied to the wafers.
To reduce the likelihood of breakage, thin wafers may need to be strengthened. FIGS. 1A through 1C illustrate cross-sectional views of intermediate stages in a conventional wafer thinning process, in which a thin wafer is strengthened. Referring to FIG. 1A, wafer 2 is bonded to carrier 6, which may be a glass carrier, through adhesive 4. Therefore, wafer 2 is supported mechanically by carrier 6. In FIG. 1B, a wafer thinning (grinding or CMP) process is performed to reduce the thickness of wafer 2. Thin wafer 2 is mechanically stronger due to the support of carrier 6. After the wafer thinning process, wafer 2 is de-bonded from carrier 6, as shown in FIG. 3. This wafer-supporting method, however, cannot be used in various manufacturing processes such as those requiring elevated temperatures. The reason is that adhesive 4 may not be able to endure the elevated temperatures. Further, in processes involving chemicals, for example, in wet etching processes, adhesive 4 may be attacked by the chemicals. Therefore, the usage of the method as shown in FIGS. 1A through 1C is limited.
FIG. 2 illustrates an alternative method for strengthening thin wafers. Mobile electrostatic carrier 8 is adapted to generate static charges, so that wafer 2 may be attracted onto mobile electrostatic carrier 8. Wafer 2 and mobile electrostatic carrier 8 may be transported and used in various process steps as a single unit. Therefore, mobile electrostatic carrier 8 provides mechanical support to wafer 2 during these process steps. To maintain the charges, however, mobile electrostatic carrier 8 needs to be periodically recharged, and hence the cost is high.
There are some other methods for strengthening wafers. For example, referring to FIG. 3, Teflon ring 10 (having a shape of ring in a top view) may be clamped onto the edge of thin wafer 2, and Teflon ring 10 and thin wafer 2 may be transported and processed as a single unit. However, no CMP can be performed to thin wafer 2 even if Teflon ring 10 is attached onto thin wafer 2.
An additional method for transporting thin wafers is shown in FIG. 4, wherein clean dry air or nitrogen (symbolized by arrows) may be blown into robot panel 14, so that wafer 2 is pushed away from a wafer holder of the robot panel for a desirable distance such as about 300 μm to about 400 μm. Wafer 2 is thus suspended in the air. Therefore, no-touch transportation is achieved. The method shown in FIG. 4, however, cannot be used to support thin wafers during integrated circuit manufacturing processes.